Hitachi SH7032 Hardware Manual page 264

Table 10.3 Register Configuration (cont)
Channel Name
2 Timer control register 2
Timer I/O control register 2
Timer interrupt enable register 2 TIER2
Timer status register 2
Timer counter 2
General register A2
General register B2
3 Timer control register 3
Timer I/O control register 3
Timer interrupt enable register 3 TIER3
Timer status register 3
Timer counter 3
General register A3
General register B3
Buffer register A3
Buffer register B3
4 Timer control register 4
Timer I/O control register 4
Timer interrupt enable register 4 TIER4
Timer status register 4
Abbrevi- Initial
ation R/W Value
TCR2 R/W H'80/H'00
TIOR2 R/W H'88/H'08
R/W H'F8/H'78
2
R/(W) *
TSR2 H'F8/H'78
TCNT2 R/W H'00
GRA2 R/W H'FF
GRB2 R/W H'FF
TCR3 R/W H'80/H'00
TIOR3 R/W H'88/H'08
R/W H'F8/H'78
2
R/(W) *
TSR3 H'F8/H'78
TCNT3 R/W H'00
GRA3 R/W H'FF
GRB3 R/W H'FF
BRA3 R/W H'FF
BRB3 R/W H'FF
TCR4 R/W H'80/H'00
TIOR4 R/W H'88/H'08
R/W H'F8/H'78
2
R/(W) *
TSR4 H'F8/H'78
Access
1
Address *
Size
H'5FFFF18 8
H'5FFFF19 8
H'5FFFF1A 8
H'5FFFF1B 8
H'5FFFF1C 8, 16, 32
H'5FFFF1D 8, 16, 32
H'5FFFF1E 8, 16, 32
H'5FFFF1F 8, 16, 32
H'5FFFF20 8, 16
H'5FFFF21 8, 16
H'5FFFF22 8
H'5FFFF23 8
H'5FFFF24 8
H'5FFFF25 8
H'5FFFF26 8, 16
H'5FFFF27 8, 16
H'5FFFF28 8, 16, 32
H'5FFFF29 8, 16, 32
H'5FFFF2A 8, 16, 32
H'5FFFF2B 8, 16, 32
H'5FFFF2C 8, 16, 32
H'5FFFF2D 8, 16, 32
H'5FFFF2E 8, 16, 32
H'5FFFF2F 8, 16, 32
H'5FFFF32 8
H'5FFFF33 8
H'5FFFF34 8
H'5FFFF35 8
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