Bus Control Register (Bcr) Bsc - Hitachi SH7032 Hardware Manual

A.2.40 Bus Control Register (BCR)
• Start Address: H'5FFFFA0
• Bus Width: 8/16/32
Register Overview:
Bit:
Bit name: DRAME
Initial value:
R/W:
Bit:
Bit name:
Initial value:
R/W:
Table A.41 BCR Bit Functions
Bit Bit Name
15 DRAM enable (DRAME)
14 Multiplex I/O enable (IOE)
13 Warp mode (WARP)
12 RD duty (RDDTY)
11 Byte access select (BAS)
606
15 14 13
IOE WARP
0 0
R/W R/W R/W
7 6
— — —
0 0
— — —
12 11
RDDTY BAS
0 0 0
R/W R/W
5 4 3
— —
0 0 0
— —
Value Description
0 Area 1 is external memory space
1 Area 1 is DRAM space
0 Area 6 is external memory space
1 Area 6 is address/data multiplex I/O space
0 Normal mode: External access and internal
access not performed simultaneously
1 Warp mode: External access and internal
access performed simultaneously
RD signal high width duty ratio is 50%
0
RD signal high width duty ratio is 35%
1
WRH, WRL, and A0 signals valid
0
WR, HBS, and LBS and signals valid
1
BSC
10 9 8
— — —
0 0 0
— — —
2 1 0
— — —
0 0 0
— — —
(Initial value)
(Initial value)
(Initial value)
(Initial value)
(Initial value)