Hitachi SH7032 Hardware Manual page 684

Table B.2 Pin States in Address Space Accesses (cont)
8-Bit
Pin Name Space
CS7, CS5–
High
CS0
CS6
Low
RAS
High
CASH
High
CASL
High
AH AH
RD
R Low
W High
WRH/LBS — *
R
— *
W
WRL/WR
R High
W Low
A0/HBS A0
A21–A1 Address
AD15–AD8 High-Z
AD7–AD0 Address/
data
R: Read
W: Write
AH: When addresses are output from AD15–AD0, an address hold signal is output.
Note: * Cannot be used; available only for 16-bit space access.
Address/Data Multiplex I/O Space
WRH, WRL, A0 System
Upper Lower
Byte Byte
High High
Low Low
High High
High High
High High
AH AH
Low Low
High High
High High
Low High
High High
High Low
Low High
Address Address
Address/ Address
data
Address Address/
data
16-Bit Space
WR, HBS, LBS System
Upper
Word Byte
High High
Low Low
High High
High High
High High
AH AH
Low Low
High High
High High
Low High
High High
Low Low
Low Low
Address Address
Address/ Address/
data data
Address/ Address
data
Lower
Byte Word
High High
Low Low
High High
High High
High High
AH AH
Low Low
High High
Low Low
Low Low
High High
Low Low
High Low
Address Address
Address Address/
data
Address/ Address/
data data
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