A/D Control/Status Register (Adcsr) - Hitachi SH7032 Hardware Manual

Bit:
ADDRn:
Initial value:
R/W:
Bit:
ADDRn:
Initial value:
R/W:
n = A–D
Table 14.3 Assignment of Data Registers to Analog Input Channels
Analog Input Channel
Group 0
AN0
AN1
AN2
AN3
14.2.2

A/D Control/Status Register (ADCSR)

The A/D control/status register (ADCSR) is an 8-bit read/write register that controls the operation
of the A/D converter (mode selection, etc.). ADCSR is initialized to H'00 by a reset and in standby
mode.
Bit:
Bit name:
Initial value:
R/W:
Note: * Only 0 can be written, to clear the flag.
15 14
AD9 AD8 AD7
0 0
R R
7 6
AD1 AD0
0 0
R R
Group 1
AN4
AN5
AN6
AN7
7 6
ADF ADIE ADST
0 0
R/(W)* R/W R/W
13 12 11
AD6 AD5
0 0 0
R R R
5 4 3
— — —
0 0 0
R R R
5 4 3
SCAN CKS
0 0 0
R/W R/W
10 9
AD4 AD3
0 0
R R
2 1
— —
0 0
R R
A/D Data Register
ADDRA
ADDRB
ADDRC
ADDRD
2 1
CH2 CH1
0 0
R/W R/W
8
AD2
0
R
0
—
0
R
0
CH0
0
R/W
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