Register Descriptions; Access State Control Register (Astcr) - Hitachi F-ZTAT H8/3039 Series Hardware Manual

6.2 Register Descriptions

6.2.1 Access State Control Register (ASTCR)

ASTCR is an 8-bit readable/writable register that selects whether each area is accessed in two
states or three states.
Bit
AST7
Initial value
Read/Write R/W
ASTCR is initialized to H'FF by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bits 7 to 0—Area 7 to 0 Access State Control (AST7 to AST0): These bits select whether the
corresponding area is accessed in two or three states.
Bits 7 to 0
AST7 to AST0
0
1
ASTCR specifies the number of states in which external areas are accessed. On-chip memory and
registers are accessed in a fixed number of states that does not depend on ASTCR settings.
Therefore, in the single-chip modes (modes 6 and 7), the set value is meaningless.
112
7 6
AST6 AST5
1 1
R/W R/W
Bits selecting number of states for access to each area
Description
Areas 7 to 0 are accessed in two states
Areas 7 to 0 are accessed in three states
5 4
AST4 AST3
1 1
R/W R/W
3 2
AST2 AST1
1 1
R/W R/W
1 0
AST0
1 1
R/W
(Initial value)