Break Address Mask Register (Bamr) - Hitachi SH7032 Hardware Manual

6.2.2

Break Address Mask Register (BAMR)

The two break address mask registers—break address mask register H (BAMRH) and break
address mask register L (BARML)—together form a single group. Both are 16-bit read/write
registers. BAMRH determines which of the bits in the break address set in BARH are masked.
BAMRL determines which of the bits in the break address set in BARL are masked. A reset
initializes BAMRH and BARML to H'0000. They are not initialized in standby mode.
BAMRH: Break address mask register H.
Bit:
Bit name:
Initial value:
R/W:
Bit:
Bit name:
Initial value:
R/W:
• BAMRH bits 15–0 (Break Address Mask 31–16 (BAM31–BAM16)): BAM31–BAM16
specify whether bits BA31–BA16 of the break address set in BARH are masked or not.
BAMRL: Break address mask register L.
Bit:
Bit name:
Initial value:
R/W:
Bit:
Bit name:
Initial value:
R/W:
• BAMRL bits 15–0 (Break Address Mask 15–0 (BAM15–BAM0)): BAM15–BAM0 specify
whether bits BA15–BA0 of the break address set in BARH are masked or not.
Bits 15–0: BAMn
0
1
n = 31–0
15 14
BAM31 BAM30 BAM29
0 0
R/W R/W
7 6
BAM23 BAM22 BAM21
0 0
R/W R/W
15 14
BAM15 BAM14 BAM13
0 0
R/W R/W
7 6
BAM7 BAM6 BAM5
0 0
R/W R/W
Description
Break address bit BAn is included in the break condition (Initial value)
Break address bit BAn is not included in the break condition
13 12 11
BAM28 BAM27
0 0
R/W R/W R/W
5 4
BAM20 BAM19
0 0
R/W R/W R/W
13 12 11
BAM12 BAM11
0 0
R/W R/W R/W
5 4
BAM4 BAM3
0 0
R/W R/W R/W
10 9
BAM26 BAM25
0 0 0
R/W R/W
3 2 1
BAM18 BAM17
0 0 0
R/W R/W
10 9
BAM10 BAM9
0 0 0
R/W R/W
3 2 1
BAM2 BAM1
0 0 0
R/W R/W
8
BAM24
0
R/W
0
BAM16
0
R/W
8
BAM8
0
R/W
0
BAM0
0
R/W
85