Block Diagram; Pin Configuration - Hitachi SH7032 Hardware Manual

12.1.2

Block Diagram

Figure 12.1 shows a block diagram of the WDT.
ITI
(interrupt
signal)
WDTOVF
Internal
reset signal *
TCSR: Timer control/status register
TCNT: Timer counter
RSTCSR: Reset control/status register
Note: * The internal reset signal can be generated by a register setting. The type of reset can be
selected (power-on or manual reset).
12.1.3

Pin Configuration

Table 12.1 shows the pin configuration.
Table 12.1 Pin Configuration
Pin
Watchdog timer overflow
336
Overflow
Interrupt
control
Reset
control
RSTCSR TCNT
Module bus
Figure 12.1 Block Diagram of WDT
Abbreviation I/O
WDTOVF
O
Clock Clock
select
TCSR
WDT
Function
Outputs the counter overflow signal in
watchdog mode
φ/2
φ/64
φ/128
φ/256
φ/512
φ/1024
φ/4096
φ/8192
Internal
clock sources
Bus
interface