Hitachi SH7032 Hardware Manual page 12

Section Page
10.4.6 271
Complementary
PWM Mode
Procedure for
Selecting
Complementary
PWM Mode (Figure
10.33):
10.6.15 ITU 301
Operating Modes
Table 10.18 ITU
Operating Modes
(Channel 0)
Table 10.19 ITU 302
Operating Modes
(Channel 1)
Table 10.20 ITU 303
Operating Modes
(Channel 2)
12.1.4 Register 337
Configuration
Table 12.2 WDT
Registers
Description
Description amended
3. Set bits CMD1 and CMD0 in TMDB to select complementary PWM
mode. TIOCA3, TIOCB3, TIOCA4, TIOCB4, TOCXA4, and
TOCXB4 become PWM pins.
Table amended
TSNC TMDR
Operating
Mode Sync MDF FDIR PWM
√
Synch- SYNC0 — —
ronized = 1
preset
√
PWM — — PWM0
= 1
√
Output — — PWM0
compare A = 0
function
Table amended
TSNC TMDR
Operating
Mode Sync MDF FDIR PWM
√
Synch- SYNC1 — —
ronized = 1
preset
√
PWM — — PWM1
= 1
√
Output — — PWM1
compare A = 0
function
Table amended
TSNC TMDR
Operating
Mode Sync MDF FDIR PWM
√
Synch- SYNC2 — —
ronized = 1
preset
√
PWM — — PWM2
= 1
√
Output — — PWM2
compare A = 0
function
*4 added
Name Abbreviation R/W
Timer control/status register TCSR
Timer counter TCNT
Reset control/status register RSTCSR
Notes: *1 Write by word transfer. A byte or longword write cannot be used.
*2 Read by byte transfer. The correct value cannot be obtained by a word or longword
read.
*3 Only 0 can be written in bit 7, to clear the flag.
*4 Only the values of bits A27–A24 and A8–A0 are valid; bits A23–A9 are ignored. For
details on the register addresses, see section 8.3.5, Area Descriptions
Register Setting
TFCR TOCR
Reset Output
Comp Sync Level
PWM PWM Buffer Select IOA
√
— — — —
— — — — —
— — — — IOA2 = 0,
others:
don't care
Register Setting
TFCR TOCR
Reset Output
Comp Sync Level
PWM PWM Buffer Select IOA
√
— — — —
— — — — —
— — — — IOA2 = 0,
others:
don't care
Register Setting
TFCR TOCR
Reset Output
Comp Sync Level
PWM PWM Buffer Select IOA
√
— — — —
— — — — —
— — — — IOA2 = 0,
others:
don't care
Initial
Write *
Value
R/(W) * 3
H'18 H'5FFFFB8
R/W H'00
3
R/(W) *
H'1F H'5FFFFBA
Edition
6
6
TIOR0 TCR0
Clear Clock
IOB Select Select
√ √ √
√ * √ √
√ √ √
6
TIOR1 TCR1
Clear Clock
IOB Select Select
√ √ √
√ * √ √
√ √ √
6
TIOR2 TCR2
Clear Clock
IOB Select Select
√ √ √
√ * √ √
√ √ √
6
4
Address *
1 2
Read *
H'5FFFFB8
H'5FFFFB9
H'5FFFFBB