Timer Synchro Register (Tsnc) - Hitachi SH7032 Hardware Manual

10.2.2

Timer Synchro Register (TSNC)

The timer synchro register (TSNC) is an eight-bit read/write register that selects timer
synchronizing modes for channels 0–4. Channels for which 1 is set in the corresponding bit will be
synchronized. TSNC is initialized to H'E0 or H'60 by a reset and in standby mode.
Bit:
Bit name:
Initial value:
R/W:
Note: * Undefined
• Bits 7–5 (Reserved): Bit 7 is read as undefined. Bits 6 and 5 are always read as 1. The write
value to bit 7 should be 0 or 1, and the write value to bits 6 and 5 should always be 1.
• Bit 4 (Timer Synchro 4 (SYNC4)): SYNC4 selects synchronizing mode for channel 4.
Bit 4: SYNC4
0
1
• Bit 3 (Timer Synchro 3 (SYNC3)): SYNC3 selects synchronizing mode for channel 3.
Bit 3: SYNC3
0
1
• Bit 2 (Timer Synchro 2 (SYNC2)): SYNC2 selects synchronizing mode for channel 2.
Bit 2: SYNC2
0
1
232
7 6 5
— — —
1 1
*
— — —
Description
The timer counter for channel 4 (TCNT4) operates independently
(Preset/clear of TCNT4 is independent of other channels)
Channel 4 operates synchronously. Synchronized preset/clear of
TNCT4 enabled.
Description
The timer counter for channel 3 (TCNT3) operates independently
(Preset/clear of TCNT3 is independent of other channels)
Channel 3 operates synchronously. Synchronized preset/clear of
TNCT3 enabled.
Description
The timer counter for channel 2 (TCNT2) operates independently
(Preset/clear of TCNT2 is independent of other channels)
Channel 2 operates synchronously. Synchronized preset/clear of
TNCT2 enabled.
4 3
SYNC4 SYNC3 SYNC2
0 0
R/W R/W
2 1
SYNC1 SYNC0
0 0
R/W R/W R/W
(Initial value)
(Initial value)
(Initial value)
0
0