Hitachi SH7032 Hardware Manual page 450

Upper byte read
CPU
receives
data H'AA
Lower byte read
CPU
receives
data H'40
Figure 14.2 Read Access to A/D Data Register (Reading H'AA40)
Bus
interface
ADDRn H
[H'AA]
Bus
interface
ADDRn H
[H'AA]
Module internal data bus
TEMP
[H'40]
ADDRn L
n = A to D
[H'40]
Module internal data bus
TEMP
[H'40]
ADDRn L
n = A to D
[H'40]
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