Hitachi SH7032 Hardware Manual page 563

Table 20.20 Bus Timing (1) (cont)
Conditions: V = 3.3 V ±0.3V, AV
CC
AV , V
CC
Notes: *1 ROMless products
*2 Regular-specification products; for wide-temperature-range products, Ta = –40 to
+85°C
Item
Write data delay time 1
Write data delay time 2
Write data hold time
Parity output delay time 1
Parity output delay time 2
Parity output hold time
Wait setup time
Wait hold time
Read data access time 1 *
Read data access time 2 *
RAS delay time 1
RAS delay time 2
CAS delay time 1
7
CAS delay time 2 *
7
CAS delay time 3 *
Column address setup time
35% duty *
Read data access
6
time from CAS 1 *
50% duty
Read data access time from
6
CAS 2 *
Read data access time from
RAS 1 * 6
Read data access time from
RAS 2 * 6
High-speed page mode CAS
precharge time
528
= 3.3 V ±0.3V, AV
CC
= 0 V, φ = 20 MHz *
= AV
SS SS
Symbol Min
t —
WDD1
t —
WDD2
t 0
WDH
t —
WPDD1
t —
WPDD2
t 0
WPDH
t 10
WTS
t 6
WTH
6
t t
ACC1
6
t t
ACC2
30 *
t —
RASD1
t —
RASD2
t —
CASD1
t —
CASD2
t —
CASD3
t 0
ASC
2
t t
CAC1
19
t
t t
CAC2
25 *
t t
RAC1
t t
RAC2
– 20 *
t t
CP
= V
CC
1
, Ta = –20 to +75°C *
Max
35
20
—
40
20
—
—
—
4
– 30 *
—
cyc
× (n+2) –
—
cyc
3
20
30
20
20
20
—
× 0.65 –
—
cyc
× 0.5 – 19 —
cyc
× (n+1) –
—
cyc
3
× 1.5 – 20 —
cyc
× (n+2.5)
—
cyc
3
× 0.25
—
cyc
±0.3V, AV = 3.0 V to
CC ref
2
Unit Figures
ns 20.53, 20.57, 20.58,
20.63
ns 20.55, 20.56
ns 20.53, 20.55–20.58
ns 20.53, 20.57, 20.58
ns 20.55, 20.56
ns 20.53, 20.55–20.58
ns 20.54, 20.59, 20.63
ns
ns 20.52, 20.55, 20.56
ns 20.53, 20.54, 20.57–20.59
ns 20.55–20.58,
20.60–20.62
ns
ns 20.55
ns 20.57, 20.58,
20.60–20.62
ns
ns 20.55, 20.56
ns
ns
ns 20.57–20.59
ns 20.55, 20.56
ns 20.57–20.59
ns 20.56