General Registers B0-4 (Grb0-Grb4) Itu - Hitachi SH7032 Hardware Manual

Superh risc engine
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A.2.20
General Registers B0–4 (GRB0–GRB4)
• Start Address: H'5FFFF0C (channel 0), H'5FFFF16 (channel 1), H'5FFFF20 (channel 2),
H'5FFFF2A (channel 3), H'5FFFF3A (channel 4)
• Bus Width: 8/16/32
Register Overview:
Bit:
Bit name:
Initial value:
R/W:
Bit:
Bit name:
Initial value:
R/W:
Table A.21 GRB0–GRB4 Bit Functions
Bit
Bit name
15–0
Registers used for both output
compare and input capture
584
15
14
13
1
1
R/W
R/W
R/W
7
6
1
1
R/W
R/W
R/W
Description
Output compare register: Set with compare match
output
Input capture register: Stores the TCNT value when the
input capture signal is generated
12
11
1
1
1
R/W
R/W
5
4
3
1
1
1
R/W
R/W
10
9
1
1
R/W
R/W
R/W
2
1
1
1
R/W
R/W
R/W
ITU
8
1
0
1

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