A/D Control Register (Adcr) - Hitachi SH7032 Hardware Manual

Superh risc engine
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• Bit 3 (Clock Select (CKS)): CKS selects the A/D conversion time. The conversion time should
be changed only when the ADST bit is cleared to 0.
Bit 3 (CKS)
Description
0
Conversion time = 266 states (maximum)
1
Conversion time = 134 states (maximum)
• Bits 2–0 (Channel Select 2–0 (CH2–CH0)): CH2–CH0 select analog input channels together
with the SCAN bit. The channel selection should be changed only when the ADST bit is
cleared to 0.
Group Select
CH2
0
0
0
1
1
1
0
0
1
1
14.2.3

A/D Control Register (ADCR)

The A/D control register (ADCR) is an 8-bit read/write register that selects whether or not to start
the A/D conversion when an external trigger is input. ADCR is initialized to H'7F by a reset and in
standby mode.
Bit:
Bit name:
Initial value:
R/W:
Channel Select
CH1
0
1
0
1
0
1
0
1
7
6
TRGE
0
1
R/W
CH0
Single Mode
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
5
4
3
1
1
1
(Initial value)
Selected Channels
Scan Mode
AN0 (Initial value)
AN0 and AN1
AN0–AN2
AN0–AN3
AN4
AN4 and AN5
AN4–AN6
AN4–AN7
2
1
1
1
0
1
413

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