A.2.9
A/D Control Register (ADCR)
• Start Address: H'5FFFEE9
• Bus Width: 8/16
Register Overview:
Bit:
Bit name:
Initial value:
R/W:
Table A.10 ADCR Bit Functions
Bit
Bit name
7
Trigger enable bit (TRGE) 0
A.2.10
Timer Start Register (TSTR)
• Start Address: H'5FFFF00
• Bus Width: 8
Register Overview:
Bit:
Bit name:
Initial value:
R/W:
7
6
TRGE
—
0
1
R/W
—
Value
1
7
6
—
—
1
1
—
—
5
4
3
—
—
—
1
1
1
—
—
—
Description
Start of A/D conversion by external trigger disabled
Start of A/D conversion by rising edge of external
conversion trigger input pin (ADTRG) enabled
5
4
3
—
STR4
STR3
1
0
0
—
R/W
R/W
2
1
—
—
1
1
—
—
(Initial value)
2
1
STR2
STR1
STR0
0
0
R/W
R/W
R/W
A/D
0
—
1
—
ITU
0
0
573