Timer Output Control Register (Tocr) Itu - Hitachi SH7032 Hardware Manual

A.2.23 Timer Output Control Register (TOCR)
• Start Address: H'5FFFF31
• Bus Width: 8
Register Overview:
Bit:
Bit name:
Initial value:
R/W:
Note: * Undetermined
Table A.24 TOCR Bit Functions
Bit Bit name
1 Output level select 4 (OLS4)
0 Output level select 3 (OLS3)
7 6 5
— — —
* 1 1
— — —
Value
0
1
0
1
4 3
— —
1 1
— —
Description
Reverse output of TIOCA3, TIOCA4, TIOCB4
Direct output of TIOCA3, TIOCA4, TIOCB4
Reverse output of TIOCB3, TOCXA4, TOCXB4
Direct output of TIOCB3, TOCXA4, TOCXB4
2 1 0
— OLS4 OLS3
1 1 1
— R/W R/W
(Initial value)
(Initial value)
ITU
587