System Registers; Initial Values Of Registers - Hitachi SH7032 Hardware Manual

Superh risc engine
Table of Contents

Advertisement

2.1.3

System Registers

System registers consist of four 32-bit registers: multiply and accumulate registers high and low
(MACH and MACL), procedure register (PR), and program counter (PC). The multiply and
accumulate registers store the results of multiply and accumulate operations. The procedure
register stores the return address for a subroutine procedure. The program counter stores program
addresses to control the flow of the processing.
31
(Sign extended)
31
31
2.1.4

Initial Values of Registers

Table 2.1 lists the values of the registers after reset.
Table 2.1
Initial Values of Registers
Classification
Register
General registers R0–R14
R15 (SP)
Control registers
SR
GBR
VBR
System registers
MACH, MACL, PR
PC
9
MACH
MACL
PR
PC
Figure 2.3 System Registers
Initial Value
Undefined
Value of the stack pointer in the vector address table
Bits I3–I0 are 1111(H'F), reserved bits are 0, and other
bits are undefined
Undefined
H'00000000
Undefined
Value of the program counter in the vector address table
Multiply and accumulate (MAC) registers
0
high and low (MACH, MACL): Store the
results of multiply and accumulate opera-
tions. MACH is sign-extended when read
because only the lowest 10 bits are valid.
0
Procedure register (PR): Stores the return
address for a subroutine procedure.
0
Program counter (PC): Indicates the
fourth byte (second instruction) after
the current instruction.
19

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents