Control Signal Timing - Hitachi SH7032 Hardware Manual

(2) Control Signal Timing

Table 20.19 Control Signal Timing
Conditions: V = 3.3 V ±0.3V, AV
CC
AV , V
CC
Note: * Regular-specification products; for wide-temperature-range products, Ta = –40 to +85°C
Item
RES setup time
RES pulse width
NMI reset setup time
NMI reset hold time
NMI setup time
NMI hold time
IRQ0–IRQ7 setup time
(edge detection)
IRQ0–IRQ7 setup time
(level detection)
IRQ0–IRQ7 hold time
IRQOUT output delay
time
Bus request setup time
Bus acknowledge delay
time 1
Bus acknowledge delay
time 2
Bus 3-state delay time
524
= 3.3 V ±0.3V, AV
CC
= 0 V, Ta = –20 to +75°C *
= AV
SS SS
Symbol Min
t 320
RESS
t 20
RESW
t 320
NMIRS
t 320
NMIRH
t 160
NMIS
t 80
NMIH
t 160
IRQES
t 160
IRQLS
t 80
IRQEH
t —
IRQOD
t 80
BRQS
t —
BACD1
t —
BACD2
t —
BZD
= V
CC
12.5 MHz
Max Min
— 200
— 20
— 200
— 200
— 100
— 50
— 100
— 100
— 50
80 —
— 50
80 —
80 —
80 —
±0.3V, AV = 3.0 V to
CC ref
20 MHz
Max Unit
— ns
— t
cyc
— ns
— ns
— ns
— ns
— ns
— ns
— ns
50 ns
— ns
50 ns
50 ns
50 ns
Figure
20.48
20.49
20.50
20.51