Output Timing - Hitachi SH7032 Hardware Manual

Port function
TPC
output pin
If new data is written in next data registers A and B before the next compare match occurs, a
maximum 16 bits of data can be output at each successive compare match. See section 11.3.4,
TPC Output Non-Overlap Operation, for details on non-overlap operation.
11.3.2

Output Timing

If TPC output is enabled, next data register (NDRA/NDRB) contents are transferred to the data
register (PBDR) and output when the selected compare match occurs. Figure 11.3 shows the
timing of these operations. The example is for ordinary output upon compare match A with groups
2 and 3.
CR
Q
Q
select
Figure 11.2 TPC Output Operation
NDER
Q
Output trigger
signal
C
DR D Q
Internal
NDR D
data bus
323