Hitachi SH7032 Hardware Manual page 424

Receiving Multiprocessor Serial Data: Figure 13.12 shows a sample flowchart for receiving
multiprocessor serial data. The procedure for receiving multiprocessor serial data is listed below.
1. SCI initialization: select the RxD pin function with the PFC.
2. ID receive cycle: set the MPIE bit in the serial control register (SCR) to 1.
3. SCI status check and compare to ID reception: read the serial status register (SSR), check that
RDRF is set to 1, then read data from the receive data register (RDR) and compare with the
processor's own ID. If the ID does not match the receive data, set MPIE to 1 again and clear
RDRF to 0. If the ID matches the receive data, clear RDRF to 0.
4. Receive error handling and break detection: if a receive error occurs, read the ORER and FER
bits in SSR to identify the error. After executing the necessary error handling, clear both
ORER and FER to 0. Receiving cannot resume if ORER or FER remain set to 1. When a
framing error occurs, the RxD pin can be read to detect the break state.
5. SCI status check and data receiving: read SSR, check that RDRF is set to 1, then read data
from the receive data register (RDR).
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