Interrupt Priority Setting Register C (Iprc) Intc - Hitachi SH7032 Hardware Manual

Superh risc engine
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A.2.31
Interrupt Priority Setting Register C (IPRC)
• Start Address: H'5FFFF88
• Bus Width: 8/16/32
Register Overview:
Bit:
Bit name:
Initial value:
R/W:
Bit:
Bit name:
Initial value:
R/W:
Table A.32 IPRC Bit Functions
Bit
Bit name
15–12
(Set DMAC0 and DMAC1 priority
levels)
11–8
(Set DMAC2 and DMAC3 priority
levels)
7–4
(Set ITU0 priority level)
3–0
(Set ITU1 priority level)
15
14
13
0
0
R/W
R/W
R/W
7
6
0
0
R/W
R/W
R/W
12
11
0
0
0
R/W
R/W
5
4
3
0
0
0
R/W
R/W
Description
Sets the DMAC0 and DMAC1 priority level values
Sets the DMAC2 and DMAC3 priority level values
Sets the ITU0 priority level value
Sets the ITU1 priority level value
INTC
10
9
0
0
R/W
R/W
R/W
2
1
0
0
R/W
R/W
R/W
8
0
0
0
597

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