Hitachi SH7032 Hardware Manual page 528

Table 20.7 Bus Timing (2)
Conditions: V = 3.0 to 5.5 V, AV
CC
AV , V
CC
Note: * Regular-specification products; for wide-temperature-range products, Ta = –40 to +85°C
Item
Address delay time
CS delay time 1
CS delay time 2
CS delay time 3
CS delay time 4
4
Access time 1 * 35% duty *
from read strobe 50% duty
4
Access time 2 * 35% duty *
from read strobe 50% duty
4
Access time 3 * 35% duty *
from read strobe 50% duty
Read strobe delay time
Read data setup time
Read data hold time
Write strobe delay time 1
Write strobe delay time 2
Write strobe delay time 3
Write strobe delay time 4
Write data delay time 1
Write data delay time 2
Write data hold time
Parity output delay time 1
Parity output delay time 2
Parity output hold time
= 3.0 to 5.5 V, AV
CC
= 0 V, φ = 12.5 MHz, Ta = –20 to +75°C *
= AV
SS SS
Symbol Min
t —
AD
t —
CSD1
t —
CSD2
t —
CSD3
t —
CSD4
t RDAC1 t cyc × 0.65 – 35
1
t cyc × 0.5 – 35
t RDAC2 t cyc × (n+1.65) – 35 *
1
t cyc × (n+1.5) – 35 *
t RDAC3 t cyc × (n+0.65) – 35 *
1
t cyc × (n+0.5) – 35 *
t —
RSD
t 25
RDS
t 0
RDH
t —
WSD1
t —
WSD2
t —
WSD3
t —
WSD4
t —
WDD1
t —
WDD2
t –10
WDH
t —
WPDD1
t —
WPDD2
t –10
WPDH
= V ±10%, AV
CC CC
Max Unit Figures
40 ns 20.21, 20.22, 20.24–
20.27, 20.32, 20.33
40 ns 20.21, 20.22, 20.33
40 ns
40 ns 20.32
40 ns
— ns 20.21,
— ns
2
— ns 20.22, 20.23
2
— ns
2
— ns 20.32
2
— ns
40 ns 20.21, 20.22,
20.24–20.28, 20.32
— ns 20.21, 20.22,
— ns 20.24-20.27, 20.32
40 ns 20.22, 20.26, 20.27,
20.32, 20.33
30 ns 20.22, 20.26, 20.27,
20.32
40 ns 20.24, 20.25
40 ns 20.24, 20.25, 20.33
70 ns 20.22, 20.26, 20.27,
20.32
40 ns 20.24, 20.26
— ns 20.22, 20.24–20.27,
20.32
80 ns 20.22, 20.24, 20.27
40 ns 20.24, 20.25
— ns 20.22, 20.23–20.27
= 3.0 V to
ref
493