Stack After Interrupt Exception Handling - Hitachi SH7032 Hardware Manual

5.4.2

Stack after Interrupt Exception Handling

Figure 5.3 shows the stack after interrupt exception handling.
Address
Notes: Bus width is 16 bits.
*1 PC stores the start address of the next instruction (return instruction) after the
executed instruction.
*2 The value of SP must always be a multiple of four.
Figure 5.3 Stack after Interrupt Exception Handling
78
PC
4n–8
4n–6
4n–4
4n–2
4n
*1
Upper 16 bits
Lower 16 bits
SR
Upper 16 bits
Lower 16 bits
*2
SP