Buffer Registers B3, 4 (Brb3, Brb4) Itu - Hitachi SH7032 Hardware Manual

Superh risc engine
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A.2.22
Buffer Registers B3, 4 (BRB3, BRB4)
• Start Address: H'5FFFF2E (channel 3), H'5FFFF3E (channel 4)
• Bus Width: 8/16/32
Register Overview:
Bit:
Bit name:
Initial value:
R/W:
Bit:
Bit name:
Initial value:
R/W:
Table A.23 BRB3, BRB4 Bit Functions
Bit
Bit name
15–0
Buffer registers used for output
compare/input capture
586
15
14
13
1
1
R/W
R/W
R/W
7
6
1
1
R/W
R/W
R/W
12
11
1
1
1
R/W
R/W
5
4
3
1
1
1
R/W
R/W
Description
Output compare register: Transfers to GRB the
value stored up to compare match generation
Input capture register: Stores the value stored in
GRB up to input capture signal generation
10
9
1
1
R/W
R/W
R/W
2
1
1
1
R/W
R/W
R/W
ITU
8
1
0
1

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