Section 11 Programmable Timing Pattern Controller (Tpc); Overview; Features - Hitachi SH7032 Hardware Manual

Superh risc engine
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Section 11 Programmable Timing Pattern Controller (TPC)

11.1

Overview

The SuperH microcomputer has an on-chip programmable timing pattern controller (TPC). The
TPC can provide pulse outputs by using the 16-bit integrated timer pulse unit (ITU) as a time base.
The TPC pulse outputs are divided into 4-bit groups 3–0. These can operate simultaneously or
independently.
11.1.1

Features

Features of the programmable timing pattern controller are listed below:
• 16-bit output data: Maximum 16-bit data can be output. TPC output can be enabled on a bit-
by-bit basis.
• Four output groups: Output trigger signals can be selected in 4-bit groups to provide up to four
different 4-bit outputs.
• Selectable output trigger signals: Output trigger signals can be selected by group from the
4-channel compare-match signals of the 16-bit integrated timer pulse unit (ITU).
• Non-overlap mode: A non-overlap interval can be set to come between multiple pulse outputs.
• Can connect to DMA controller: The compare-match signals selected as output trigger signals
can activate the DMA controller for sequential output of data without CPU intervention.
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