A.2.34
Interrupt Control Register (ICR)
• Start Address: H'5FFFF8E
• Bus Width: 8/16/32
Register Overview:
Bit:
Bit name:
Initial value:
R/W:
Bit:
Bit name:
Initial value:
R/W:
Note: * NMI pin input high: 1
NMI pin input low: 0
Table A.35 ICR Bit Functions
Bit
Bit Name
15
NMI input level (NMIL)
8
NMI edge select (NMIE)
7–0
IRQ0–7 sense select
(IRQ0–IRQ7)
600
15
14
NMIL
—
*
0
R
—
7
6
IRQ0S
IRQ1S
IRQ2S
0
0
R/W
R/W
13
12
11
—
—
—
0
0
—
—
—
5
4
IRQ3S
IRQ4S
0
0
R/W
R/W
R/W
Value
Description
0
Low input to NMI pin
1
High input to NMI pin
0
Interrupt request sensed at falling edge of
NMI input
1
Interrupt request sensed at rising edge of
NMI input
Interrupt request sensed at IRQ input low
0
level
Interrupt request sensed at IRQ input
1
falling edge
10
9
—
—
0
0
0
—
—
3
2
1
IRQ5S
IRQ6S
0
0
0
R/W
R/W
INTC
8
NMIE
0
R/W
0
IRQ7S
0
R/W
(Initial value)
(Initial value)