Contention Between Counter Clearing By Input Capture And Counter Increment - Hitachi SH7032 Hardware Manual

10.6.7

Contention Between Counter Clearing by Input Capture and Counter Increment

If an input capture signal and counter increment signal occur simultaneously, the counter is
cleared by the input capture signal. The counter is not incremented by the increment signal. The
TCNT value before the counter is cleared is transferred to the general register. The timing is
shown in figure 10.64.
Input capture
clear signal
Figure 10.64 Contention between Counter Clearing by Input Capture and Counter
296
CK
signal
Counter
TCNT
input clock
TCNT
GR
N
Increment
H'0000
N