(When The Output Triggers Of Tpc Output Groups 0 And 1 Are Different); Next Data Register A (Ndra) Tpc; Next Data Register B (Ndrb) Tpc - Hitachi SH7032 Hardware Manual

A.2.70 Next Data Register A (NDRA)

(When the Output Triggers of TPC Output Groups 0 and 1 are Different)

• Start Address: H'5FFFFF5
• Bus Width: 8/16
Register Overview:
Bit:
Bit name:
Initial value:
R/W:
Table A.71 NDRA Bit Functions
Bit Bit Name
7–4 Next data 7–4 (NDR7–
NDR4)
A.2.71 Next Data Register A (NDRA)
(When the Output Triggers of TPC Output Groups 0 and 1 are Different)
• Start Address: H'5FFFFF7
• Bus Width: 8/16
Register Overview:
Bit:
Bit name:
Initial value:
R/W:
Table A.72 NDRA Bit Functions
Bit Bit Name
3–0 Next data 3–0 (NDR3–
NDR0)
640
7 6
NDR7 NDR6 NDR5
0 0
R/W R/W R/W
Description
Stores the next output data for TPC output group 1
7 6
— —
1 1
— —
Description
Stores the next output data for TPC output group 0
5 4 3
NDR4 —
0 0 1
R/W —
5 4 3
— — NDR3
1 1 0
— — R/W
2 1
— —
1 1
— —
2 1
NDR2 NDR1 NDR0
0 0
R/W R/W R/W
TPC
0
—
1
—
TPC
0
0