16-Bit Integrated Timer Pulse Unit Timing - Hitachi SH7032 Hardware Manual

DREQ0, DREQ1

(5) 16-bit Integrated Timer Pulse Unit Timing

Table 20.22 16-bit Integrated Timer Pulse Unit Timing
Conditions: V = 3.3 V ±0.3V, AV
CC
AV , V
CC
Notes: * Regular-specification products; for wide-temperature-range products, Ta = –40 to +85°C
Item
Output compare delay time
Input capture setup time
Timer clock input setup time
Timer clock pulse width
(single edge)
Timer clock pulse width
(both edges)
CK
Output
*1
compare
Input
*2
capture
Notes: *1 TIOCA0–TIOCA4, TIOCB0–TIOCB4, TOCXA4, TOCXB4
*2 TIOCA0–TIOCA4, TIOCB0–TIOCB4
CK
edge
Figure 20.66 DREQ0, DREQ1 Input Timing (2)
= 3.3 V ±0.3V, AV
CC
= 0 V, Ta = –20 to +75°C *
= AV
SS SS
Symbol
t
TOCD
t
TICS
t
TCKS
t
TCKWH/L
t
TCKWL/L
t
TOCD
Figure 20.67 ITU Input/Output Timing
t
DRQW
= V
CC
12.5 MHz
Min Max Min
— 100 —
50 — 35
50 — 50
1.5 — 1.5
2.5 — 2.5
t
TICS
±0.3V, AV = 3.0 V to
CC ref
20 MHz
Max Unit
100 ns
— ns
— ns
— t
cyc
— t
cyc
Figure
20.67
20.68
547