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4.5
Stack Status after Exception Handling
Figure 4-5 shows the stack after completion of trap instruction exception handling and interrupt
exception handling.
SP-4
SP-3
SP-2
SP-1
SP (ER7) →
Before exception handling
Legend
PC
:
Bits 23 to 16 of program counter (PC)
E
PC
:
Bits 15 to 8 of program counter (PC)
H
PC
:
Bits 7 to 0 of program counter (PC)
L
CCR:
Condition code register
SP:
Stack pointer
Notes: 1. PC indicates the address of the first instruction that will be executed after return.
2. Registers must be saved in word or longword size at even addresses.
Figure 4-5 Stack after Completion of Exception Handling
4.6
Notes on Stack Usage
When accessing word data or longword data, the H8/3006 and H8/3007 regards the lowest address
bit as 0. The stack should always be accessed by word access or longword access, and the value of
the stack pointer (SP: ER7) should always be kept even.
Use the following instructions to save registers:
PUSH.W Rn
PUSH.L ERn
Use the following instructions to restore registers:
POP.W Rn
POP.L ERn
74
SP (ER7)
SP+1
SP+2
SP+3
Stack area
SP+4
Pushed on stack
(MOV.W Rn, @–SP)
(MOV.L ERn, @–SP)
(MOV.W @SP+, Rn)
(MOV.L @SP+, ERn)
→
CCR
PC
E
PC
H
PC
L
After exception handling
Even address
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