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4.5 Stack Status after Exception Handling
Figure 4-4 shows the stack after completion of trap instruction exception handling and interrupt
exception handling.
SP-4
SP-3
SP-2
SP-1
SP (ER7) →
Stack area
Before exception handling
Legend
PCE:
Bits 23 to 16 of program counter (PC)
PCH:
Bits 15 to 8 of program counter (PC)
PCL:
Bits 7 to 0 of program counter (PC)
CCR:
Condition code register
SP:
Stack pointer
Notes:
1.
PC indicates the address of the first instruction that will be executed after return.
2.
Saving and restoring of registers must be conducted at even addresses in word-size
or longword-size units.
Figure 4-4 Stack after Completion of Exception Handling (Advanced Mode)
4.6 Notes on Stack Usage
When accessing word data or longword data, the H8/3035 Series regards the lowest address bit
as 0. The stack should always be accessed by word access or longword access, and the value of
the stack pointer (SP, ER7) should always be kept even. Use the following instructions to save
registers:
PUSH.W Rn
PUSH.L ERn
Use the following instructions to restore registers:
POP.W Rn
POP.L ERn
66
SP (ER7)
SP+1
SP+2
SP+3
SP+4
Save on stack
(or MOV.W Rn, @–SP)
(or MOV.L ERn, @–SP)
(or MOV.W @SP+, Rn)
(or MOV.L @SP+, ERn)
→
CCR
PC
E
PC
H
PC
L
After exception handling
Even address
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