External Trigger Input Timing - Hitachi H8/3032 Series Hardware Manual

Table 12-4 A/D Conversion Time (Single Mode)
Synchronization delay
Input sampling time
A/D conversion time
Note: Values in the table are numbers of states.

12.4.4 External Trigger Input Timing

A/D conversion can be externally triggered. When the TRGE bit is set to 1 in ADCR, external
trigger input is enabled at the ADTRG pin. A high-to-low transition at the ADTRG pin sets the
ADST bit to 1 in ADCSR, starting A/D conversion. Other operations, in both single and scan
modes, are the same as if the ADST bit had been set to 1 by software. Figure 12-6 shows the
timing.
Downloaded from Elcodis.com electronic components distributor
Symbol
t
D
t
SPL
t
CONV
ø
ADTRG
Internal trigger
signal
ADST
Figure 12-6 External Trigger Input Timing
CKS = 0
Min Typ Max Min
10 — 17 6
— 80 — —
259 — 266 131
A/D conversion
386
CKS = 1
Typ Max
— 9
40 —
— 134