External Trigger Input Timing; Interrupts; Figure 16.6 External Trigger Input Timing; Table 16.5 A/D Converter Interrupt Source - Hitachi H8S/2215 Series Hardware Manual

16.5.4

External Trigger Input Timing

A/D conversion can be externally triggered. When the TRGS0 and TRGS1 bits are set to 11 in
ADCR, external trigger input is enabled at the ADTRG pin. A falling edge at the ADTRG pin sets
the ADST bit to 1 in ADCSR, starting A/D conversion. Other operations, in both single and scan
modes, are the same as when the bit ADST has been set to 1 by software. Figure 16.6 shows the
timing.
ø
Internal trigger signal
ADST
16.6

Interrupts

The A/D converter generates an A/D conversion end interrupt (ADI) at the end of A/D conversion.
Setting the ADIE bit to 1 enables ADI interrupt requests while the bit ADF in ADCSR is set to 1
after A/D conversion is completed. The DMAC or DTC can be activated by an ADI interrupt.

Table 16.5 A/D Converter Interrupt Source

Name Interrupt Source
ADI A/D conversion completed ADF
Rev. 3.0, 10/02, page 544 of 686

Figure 16.6 External Trigger Input Timing

Interrupt Source Flag DMAC or DTC Activation
A/D conversion
Possible