External Trigger Input Timing - Hitachi H8/3048 Hardware Manual

Table 15-4 A/D Conversion Time (Single Mode)
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Synchronization delay
Input sampling time
A/D conversion time
Note: Values in the table are numbers of states.

15.4.4 External Trigger Input Timing

A/D conversion can be externally triggered. When the TRGE bit is set to 1 in ADCR, external
trigger input is enabled at the ADTRG pin. A high-to-low transition at the ADTRG pin sets the
ADST bit to 1 in ADCSR, starting A/D conversion. Other operations, in both single and scan
modes, are the same as if the ADST bit had been set to 1 by software. Figure 15-6 shows the
timing.
ø
ADTRG
Internal trigger
signal
ADST
Symbol Min
t 10
D
t —
SPL
t 259
CONV
Figure 15-6 External Trigger Input Timing
538
CKS = 0
Typ Max Min
— 17 6
63 — —
— 266 131
A/D conversion
CKS = 1
Typ Max
— 9
31 —
— 134