Spi Signal Timing - Fujitsu MB86R02 Jade-D Hardware Manual

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MB86R02 'Jade-D' Hardware Manual V1.64

SPI Signal Timing

Table 34-34 SPI AC Timing

A indicates APB bus clock cycle.

Load capacitance = 30pF

Analysis relative to falling SCK TODO

Figure 34-34 SPI Timing

Polarity of SPI_SCK is determined by the register setting.

Operating frequency

Setup time, SPI_DI valid before

Hold time, SPI_DI valid after SPI_SCK

Delay time, SPI_SCK