Table of Contents
Advertisement
MB86R02 'Jade-D' Hardware Manual V1.64
SignBReferenceBW0
Register address
BaseAddress + 3C
Bit number
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Field name
R/W
Reset value
Signature B Reference value channel B
Bit 31 -
SignBReferenceBW0
0
Signature B Reference value channel B, Register content is overtaken with write of Register TriggerW0.Trigger, during cyclic mode
with every frame start
ThrBRW0
Register address
BaseAddress + 40
Bit number
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Field name
R/W
Reset value
Threshold Signature B
Bit 31 -
ThrBRW0
0
Threshold Signature B for channels R, Register content is overtaken with write of Register TriggerW0.Trigger, during cyclic mode with
every frame start
ThrBGW0
Register address
BaseAddress + 44
Bit number
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Field name
R/W
Reset value
Threshold Signature B
Bit 31 -
ThrBGW0
0
Threshold Signature B for channel G, Register content is overtaken with write of Register TriggerW0.Trigger, during cyclic mode with
every frame start
ThrBBW0
Register address
BaseAddress + 48
Bit number
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Field name
R/W
Reset value
Threshold Signature B
Bit 31 - 0
ThrBBW0
Threshold Signature B for channel B
ErrorThreshold
Register address
BaseAddress + 4C
Bit number
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Field name
R/W
Reset value
Error Counter Threshold
Bit 23 - 16
ErrThresReset
number of consecutive error free video frames which cause resetting of error_count.
0h= no reset, 1h= 1, ...FFh=255
Bit 7 - 0
ErrThres
threshold of error counter, 0h=256, 1h=1, ...,FFh=255 If error_counter >= "ErrThres" it generates interrupt
CtrlCfgW0
Register address
BaseAddress + 50
Bit number
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
Field name
R/W
H
H
H
H
H
ErrThresReset
H
SignBReferenceBW0
RW
0
H
ThrBRW0
RW
0
H
ThrBGW0
RW
0
H
ThrBBW0
RW
0
H
RW
8
H
16
15 14 13 12 11 10 9
EnCoordW0
RW
ErrThres
RW
1
H
8
7 6 5 4 3 2 1
0
EnSignB
EnSignA
RW
RW
21-8
Advertisement
Table of Contents
