Soft Reset Register 1 For Macro (Cmsr1) - Fujitsu MB86R02 Jade-D Hardware Manual

MB86R02 'Jade-D' Hardware Manual V1.64

7.4.19 Soft reset register 1 for macro (CMSR1)

Address
Bit 31 30 29
Name SRST1_31 SRST1_30 SRST1_29 SRST1_28 SRST1_27 SRST1_26 SRST1_25
R/W R R R
Initial value 0 0 0
Bit 15 14 13
Name SRST1_15 SRST1_14 SRST1_13 SRST1_12 SRST1_11 Res
R/W R/W R/W R/W
Initial value 0 0 0
Bit field
Number Name
31 SRST1_31 (GPIO
Soft Reset)
30 SRST1_30 (AXI
Soft Reset)
29 SRST1_29
(MediaLB Soft
Reset)
28 SRST1_28
(HBUS2AXI Soft
Reset)
27 SRST1_27
(MBUS2AXI(Draw)
Soft Reset)
7-30
FFF4_2000 + F4h
28 27 26 25
R/W R/W R/W R/W
0 0 0 0
12 11 10 9
SRST1_9 Res
R/W R/W R R/W
0 0 0 0
Reset the GPIO macro by writing "1" to this bit.
Set a '0' in this bit(field) during reset release.
0 No Soft Reset (initial value)
1 Soft Reset
Do the output of reset to (AXI macro by writing "1" to this bit.
Set a '0' in this bit(field) during reset release.
0 No Soft Reset (initial value)
1 Soft Reset
Do the output of reset to (MediaLB macro by writing "1" to this bit.
Set a '0' in this bit(field) during reset release.
0 No Soft Reset (initial value)
1 Soft Reset
Reset the HBUS2AXI macro by writing "1" to this bit. Set a '0' in this bit(field) during reset
release.
0 No Soft Reset (initial value)
1 Soft Reset
Reset the MBUS2AXI(Draw) macro by writing "1" to this bit. Set a '0' in this bit(field) during reset
release.
0 No Soft Reset (initial value)
1 Soft Reset
24 23 22 21
SRST0_2
Res Res Res
4
R/W R R R
0 0 0 0
8 7 6 5
Res SRST1_6 SRST1_5
R R R/W R/W
0 0 0 0
Function
20 19 18 17
Res Res SRST1_18 SRST1_17 SRST1_16
R R R R/W
0 0 0 0
4 3 2 1
SRST1_4 SRST1_3 SRST1_2 SRST1_1
R/W R/W R/W R/W
0 0 0 0
16
R/W
0
0
SRST1_0
R/W
0