Fujitsu MB86R02 Jade-D Hardware Manual page 766

MB86R02 'Jade-D' Hardware Manual V1.64
Channel Address
UART ch3 FFF51004h
FFF51008h
FFF5100Ch
FFF51010h
FFF51014h
FFF51018h
UART ch4 FFF43000h
FFF43004h
FFF43008h
FFF4300Ch
FFF43010h
FFF43014h
FFF43018h
UART ch5 FFF44000h
FFF44004h
FFF44008h
FFF4400Ch
FFF44010h
FFF44014h
FFF44018h
DLAB: Bit7 of Line control register (LCR)
28-4
Register
URT3DLL Divider latch (low order byte) register that is valid in DLAB = 1
URT3IER Interrupt enable that is valid in DLAB = 0.
URT3DLM Divider latch (high order byte) register that is valid in DLAB = 1
URT3IIR Interrupt ID register (read only)
URT3FCR FIFO control (write only)
URT3LCR Line control register
URT3MCR Modem control register
URT3LSR Line status register (read only)
URT3MSR Modem status register (read only)
URT4RFR Reception FIFO register (read only) that is valid in DLAB = 0
URT4TFR Transmission FIFO register (write only) that is valid in DLAB = 0
URT4DLL Divider latch (low order byte) register that is valid in DLAB = 1
URT4IER Interrupt enable that is valid in DLAB = 0.
URT4DLM Divider latch (high order byte) register that is valid in DLAB = 1
URT4IIR Interrupt ID register (read only)
URT4FCR FIFO control (write only)
URT4LCR Line control register
URT4MCR Modem control register
URT4LSR Line status register (read only)
URT4MSR Modem status register (read only)
URT5RFR Reception FIFO register (read only) that is valid in DLAB = 0
URT5TFR Transmission FIFO register (write only) that is valid in DLAB = 0
URT5DLL Divider latch (low order byte) register that is valid in DLAB = 1
URT5IER Interrupt enable that is valid in DLAB = 0.
URT5DLM Divider latch (high order byte) register that is valid in DLAB = 1
URT5IIR Interrupt ID register (read only)
URT5FCR FIFO control (write only)
URT5LCR Line control register
URT5MCR Modem control register
URT5LSR Line status register (read only)
URT5MSR Modem status register (read only)
Description