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MB86R02 'Jade-D' Hardware Manual V1.64
L5M (L5 layer Mode)
Register
DisplayBaseAddress + 0x88
address
Bit number
31
30 29 28 27 26 25 24 23 22 21 --- 17 16 15 14 13 12 11 10 9
Bit field name
L5C
L5FLP
R/W
RW
Initial value
0
Bit 11 to 0
L5H (L5 layer Height)
Specifies the height of the logic frame of the L5 layer in pixel units. Setting value + 1 is
the height
Bit 23 to 16
L5W (L5 layer memory Width)
Sets the memory width (stride) logic frame of the L5 layer in 64-byte units
Bit 30 and 29
L5FLP (L5 layer Flip mode)
Sets flipping mode for L5 layer
00
01
10
11
Bit 31
L5C (L5 layer Color mode)
Sets the color mode for L5 layer
0
1
18-92
Reserved
RW
R0
0
0
Displays frame 0
Displays frame 1
Switches frame 0 and 1 alternately for display
Reserved
Indirect color (8 bits/pixel) mode ARGB
Direct color (16 bits/pixel) mode ARGB
L5W
Reserved
RW
R0
X
0
8 ----
2
1
0
L5H
RW
X
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