Table of Contents
Advertisement
MB86R02 'Jade-D' Hardware Manual V1.64
Bit 14 - 0
SPGPSOFF_Y0
Y scan position
DIR_SPG0MaskOff
Register address
BaseAddress + 410
Bit number
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Field name
R/W
Reset value
Bit 30 - 0
SPGMKOFF0
Mask bits: 0b=include bit in position matching, 1b= do not include this bit in position matching
DIR_SPG1PosOn
Register address
BaseAddress + 414
Bit number
31
Field name
SPGPSON_TOGGLE1
R/W
RW
Reset value
0
H
Sync pulse generator 1, 'Switch on' position
Bit 31
SPGPSON_TOGGLE1
Toggle enable: 0b=disable, 1b=enable
Bit 30 - 16
SPGPSON_X1
X scan position
Bit 15
Reserved
Do not modify
Bit 14 - 0
SPGPSON_Y1
Y scan position
DIR_SPG1MaskOn
Register address
BaseAddress + 418
Bit number
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Field name
R/W
Reset value
Bit 30 - 0
SPGMKON1
mask bits (1= do not include this bit into position matching)
DIR_SPG1PosOff
Register address
BaseAddress + 41C
Bit number
31
Field name
SPGPSOFF_TOGGLE1
R/W
RW
Reset value
0
Sync pulse generator 1, 'Switch off' position
Bit 31
SPGPSOFF_TOGGLE1
Toggle enable: 0b=disable, 1b=enable
Bit 30 - 16
SPGPSOFF_X1
X scan position
Bit 15
Reserved
Do not modify
Bit 14 - 0
SPGPSOFF_Y1
Y scan position
DIR_SPG1MaskOff
Register address
BaseAddress + 420
Bit number
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Field name
R/W
Reset value
Bit 30 - 0
SPGMKOFF1
Mask bits: 0b=include bit in position matching, 1b= do not include this bit in position matching
DIR_SPG2PosOn
22-8
H
H
30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
SPGPSON_X1
H
H
30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
SPGPSOFF_X1
H
H
SPGMKOFF0
RW
0
H
15
Reserved
RW
RW
0
0
H
H
SPGMKON1
RW
0
H
15
Reserved
RW
RW
0
0
H
SPGMKOFF1
RW
0
H
14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SPGPSON_Y1
RW
0
H
14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SPGPSOFF_Y1
RW
0
H
H
Advertisement
Table of Contents
