Fujitsu MB86R02 Jade-D Hardware Manual page 7

MB86R02 'Jade-D' Hardware Manual V1.64
V0.05 18.12.2008
V0.04 17.10.2008
V0.03 12.08.2008
TDI, added information about internal pull-up/down resistors
for numerous pins, corrected number of IRC channels to 3.
GDC: corrected blending registers description
IRC: Removed IRC overview diagram (covered by tables)
Pin multiplex tables, changes to CMPX_MODE_2[1:0] and
CMPX_MODE_3[1:0] and CMPX_MODE_2[1:0].
von Treuberg
Updated pins lists, package layouts
GDC: initial values of DCM3 register changed
ADC: completely new register description
SSCG: extended and updated register description
PWM: corrected all offset addresses of registers
TCON: updated register description
RBC: added limitation when using VINITHI/REMAP
IRC: replaced TBDs with latest information
DDR2: made changes to 'SDRAM initialization procedure' and
'ODT Setting Procedure'
CCNT: corrected typo in register CIST, added new register
information to CMBUS.
APIX: added application note for PCB designers
von Treuberg
General changes: English improvements
Overview: Added unused pins list
Memory Map (updated figure)
CRG (Table 5-3 timings updated, register descriptions updated
for CRPR, CRHR, CRHB, CSEL, new registers CRDP0.
CRPD1 added)
CCNT (register MBUS2AXU added, changed registers CIST,
CEX_PIN_ST, CMSR1, CMSR2)
APIX (complete register update)
PWM (register update)
von Treuberg Major changes:
Preface: new block diagram
Overview (preliminary pinning information, multiplexing)
System Configuration (example configuration)
Memory Map (updated figure)
CRG (corrected 42.5 MHz > 41.625 MHz, MLB has 2 clocks,
SELXCLK changed, SSCG register start changed, Hint for
disabling non-active module clocks, predivider reminder
added, added predivider PLL info)
IRC (added IRC2 for 16 new interrupts)
DMAC (added DMA trigger from RH DREQ Rx + Tx)
CCNT (removed USB set and related registers, added soft
reset registers/bitfields, removed IDE related registers,
removed I2S endian bits)
HOSTIFC (content added)
APIX (added content and register description)
PWM (updated register description)
I2S (updated register description)
ADC (extended for 4 channels)
I2C (updated register description)
TCON (Added flow control, revised feature list, added clock
position pin mapping tables, added software reset description,