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MB86R02 'Jade-D' Hardware Manual V1.64
17.6 Control Flow
//Global APIX PHY and PLL config
set APPLLCFG.En_PLL = 1; // Enable PLL
set COMPHYCFG.En_OffsetComp = 1; // Enable Offset Compensation
//config of channel n=0 of used Ashell, here e.g. TX Ashell Tn
set CHnCFG.ENUpPHY = 1; set CHnCFG.ENDwnPHY = 1 // Enable upstream/downstream PHY
// deactivate resets
Set APPLLCFG.PhyPllReset = 0; // PLL reset deactivate
Set COMPHYCFG.SwRstToPHY; // APIX PHY reset deactivate
set TnCTRL.CFGEN = 1
set TnCFG0 = xx
set TnCFG1 = xx
set TnCFG2 = xx
set TnCTRL.CFGEN = 0
read TnSTS0 (check for TnPHYUPREADY ==1, TnPLLGOOD ==1)
provide valid pixeldata RGB , HS,VS ,DE
read @Indigo RH ASStatus (check for rx_px_aligned)
same for channel n = 1
17-39
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