Fujitsu MB86R02 Jade-D Hardware Manual page 875

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MB86R02 'Jade-D' Hardware Manual V1.64
I2S_SCKx
I2S_WSx
(FSPH=0, FSLN=0)
I2S_WSx
(FSPH=1, FSLN=0)
I2S_WSx
(FSPH=0, FSLN=1)
I2S_WSx
(FSPH=1, FSLN=1)
I2S_SDOx
I2S_SDIx
FSPH is bit 2 of I2Sx_CNTREG register.
FSLN is bit 1 of I2Sx_CNTREG register.
Figure 34-30 Master Mode Timing
I2S_SCKx
I2S_WSx
(FSPH=0, FSLN=0)
I2S_WSx
(FSPH=1,FSLN=0)
I2S_WSx
(FSPH=0, FSLN=1)
I2S_WSx
(FSPH=1, FSLN=1)
I2S_SDOx
I2S_SDIx
Figure 34-31 Slave Mode Timing
34-36
t
mcyc
t
t
mlw
mhw
t
t
dfs
dfs
t
dfs
t
dfs
t
dfs
t
dfb1
t
sdi
t
scyc
t
t
shw
slw
t
t
sfi
hfi
t
t
sfi
hfi
t
sfi
t
sfi
t
dfb1
t
hd
t
sdi
i
t
dfs
t
ddo
t
t
hd
hd
t
sdi
i
i
t
ddo
t
hd
t
sdi
i
t
dfs
t
dfs

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