Table of Contents
Advertisement
MB86R02 'Jade-D' Hardware Manual V1.64
34.5.5.3
Output Signal
Table 34-27 AC Timing of Video Interface Input Signal
Signal
Symbol
DISP0[11:0]P,
DISP0[11:0]N
Tdrgb0
*1
DOUTR1[5:0],
DOUTG1[5:0],
Tdrgb1
DOUTB1[5:0]
HSYNC0 (o) *1
Tdhsync0
HSYNC1 (o)
Tdhsync1 HSYNC output delay time
VSYNC0 (o) *1
Tdvsync0
VSYNC1 (o)
Tdvsync1 VSYNC output delay time
DE0/CSYNC0 *1
Tdcsync0
DE1/CSYNC1
Tdcsync1 CSYNC output delay time
GV0 *1
Tdgv0
GV1
Tdgv1
Load Capacitance 20pF except *1
Note: If hold time is deficient, inverting DCLKO clock is recommended.
*1 Values are valid for DISP0 IF at TCON bypass mode, Load Capacitance 30pF
n
DCLK I
n
HSYNC
(i)
n
VSYNC
(i)
Figure 34-20 Display Input Signal Timing
34-28
Description
RGB output delay time with "TCON
bypass active"
RGB output delay time
HSYNC output delay time, with
"TCON bypass active"
VSYNC output delay time, with
"TCON bypass active"
CSYNC output delay time, with
"TCON bypass active"
GV output delay time, with "TCON
bypass active"
GV output delay time
n
1/Fdclki
n
Thdclki
n
Twhsync
n
n
Tshsync
Thhsync
n
Tsvsync
Min.
0.2
-0.6
1.0
-0.6
1.0
-0.6
1.0
-0.6
1.0
-0.6
n
Tldclki
n
Twvsync
Value
Unit
Typ.
Max.
–
6.1
ns
–
3.6
ns
–
6.0
ns
–
3.6
ns
–
6.0
ns
–
3.6
ns
–
6.0
ns
–
3.6
ns
–
6.0
ns
–
3.6
Ns
n
Thvsync
Advertisement
Table of Contents
