Register Description - Fujitsu MB86R02 Jade-D Hardware Manual

MB86R02 'Jade-D' Hardware Manual V1.64
Base address +
60
H
Base address +
64
H
Base address +
68
H
Base address +
6C
H
Base address +
70
H
Base address +
74
H
Base address +
78
H
Base address +
7C
H
21.4.4

Register Description

SigSWreset
Register address BaseAddress + 0
Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
Field name
R/W
Reset value
SIG-modul SW reset
Bit 0 SWRes
SW reset
SigCtrl
Register address BaseAddress + 4
Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Field name
R/W
Reset value
SIG-modul general config register
Bit 17 - 16 SrcSel
Source Select 00b=source 0, 01b=source 1, 10b=source 2, 11b=source 3
Bit 9 - 8 Vmask_mode
00b=nomask, 01b=mask inside vertical coordinates, 10b=mask outside vertical coordinates, 11b=reserved
Bit 1 - 0 Hmask_mode
00b=nomask, 01b=mask inside horizontal coordinates, 10b=mask outside horizontal coordinates, 11b=reserved
MaskHorizontalUpperLeft
Register address BaseAddress + 8
Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Field name
R/W
Reset value
Mask coordinates
Bit 11 - 0 MaskHorizontalUpperLeft
Mask Horizontal Upper Left
MaskHorizontalLowerRight
Register address BaseAddress + C
Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11
Field name
R/W
StatusW0
Signature_error
SignatureARW0
SignatureAGW0
SignatureABW0
SignatureBRW0
SignatureBGW0
SignatureBBW0
H
H
H
H
status register
The amount of video frames with signature errors
Signature A Result channel R
Signature A Result channel G
Signature A Result channel B
Signature B Result channel R
Signature B Result channel G
Signature B Result channel B
9
SrcSel Vmask_mode
RW
0
H
SWRes
RW
0
8 7 6 5 4 3 2 1
Hmask_mode
RW RW
0 0
H H
MaskHorizontalUpperLeft
RW
0
H
10 9 8 7 6 5 4 3 2 1 0
MaskHorizontalLowerRight
RW
21-5
0
H
0