Fujitsu MB86R02 Jade-D Hardware Manual page 158

MB86R02 'Jade-D' Hardware Manual V1.64
Bit field
Number Name
13 SRST2_13
(DPERI0 Soft
Reset)
12 SRST2_12 (RLD2
Soft Reset)
11 SRST2_11
(APIXch1 Soft
Reset)
10 SRST2_10
(APIXch0 Soft
Reset)
9 SRST2_9 (ADC Soft
Reset)
8 SRST2_8 (PWM_7
Soft Reset)
7 SRST2_7 (PWM_6
Soft Reset)
6 SRST2_6 (PWM_5
Soft Reset)
7-34
Do the output of reset to DPERI0 macro by writing "1" to this bit.
Set a '0' in this bit(field) during reset release.
0 No Soft Reset (initial value)
1 Soft Reset
Reset the RLD macro by writing "1" to this bit.
Set a '0' in this bit(field) during reset release.
0 No Soft Reset (initial value)
1 Soft Reset
Reset the APIX ch1 (incl PHY, Ashell, RegIf) macro by writing "1" to this bit.
Set a '0' in this bit(field) during reset release.
0 No Soft Reset (initial value)
1 Soft Reset
Reset the APIX ch0 (incl PHY, Ashell, RegIf) macro by writing "1" to this bit.
Set a '0' in this bit(field) during reset release.
0 No Soft Reset (initial value)
1 Soft Reset
Reset the ADC macro by writing "1" to this bit.
Set a '0' in this bit(field) during reset release.
0 No Soft Reset (initial value)
1 Soft Reset
Reset the PWM_7 macro by writing "1" to this bit.
Set a '0' in this bit(field) during reset release.
0 No Soft Reset (initial value)
1 Soft Reset
Reset the PWM_6 macro by writing "1" to this bit.
Set a '0' in this bit(field) during reset release.
0 No Soft Reset (initial value)
1 Soft Reset
Reset the PWM_5 macro by writing "1" to this bit.
Set a '0' in this bit(field) during reset release.
0 No Soft Reset (initial value)
1 Soft Reset
Function