Odt Auto Bias Adjust Register (Droaba) - Fujitsu MB86R02 Jade-D Hardware Manual

Graphics controller
Hide thumbs Also See for MB86R02 Jade-D:
Table of Contents

Advertisement

MB86R02 'Jade-D' Hardware Manual V1.64
13.6.17

ODT auto bias adjust register (DROABA)

This register sets auto. adjustment related items of ODT bias.
Address
Bit
15
14
13
Name
-
-
-
R/W
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial value
X
X
X
Bit field
No.
Name
15-9
(Reserved)
8
OCOMPNPOL
7
OCOMPPPOL
6-4
(Reserved)
3-2
IAVSET
1-0
ODTBIAS
Remark: Each setting of bit2 ~ 8 should be set after setting ODTBIAS of bit 1 ~ 0 to "00" and stopping auto.
adjustment operation.
13-22
12
11
10
9
-
-
-
-
X
X
X
X
Reserved bits.
Write access is ignored.
This sets to detect either 0 → 1 or 1 → 0 of OCOCMPN value as valid at bias
adjustment operation.
0 → 1 is valid
0
1 → 0 is valid (initial value)
1
This sets to detect either 0 → 1 or 1 → 0 of OCOCMPP value as valid at bias
adjustment operation.
0 → 1 is valid (initial value)
0
1 → 0 is valid
1
Reserved bits.
Write access is ignored.
Average number of times of bias adjustment is specified.
Adjustment is performed for predetermined number of times to output the average
value to
ODT of the I/O cell.
00 32 times (initial value)
01 64 times
10 128 times
11 256 times
Operation of bias auto. adjustment circuit is set.
00 Auto. adjustment circuit of the bias is reset (initial value)
01 OCD adjustment mode
10 Reserved (setting prohibited)
11 Auto. adjustment circuit of the bias is performed
F300_0000
+ 70
H
H
8
7
6
5
OCO
OCO
MPPPO
-
-
MPNPOL
L
1
0
X
X
Description
4
3
2
1
-
IAVSET
ODTBIAS
X
0
0
0
0
0

Advertisement

Table of Contents
loading

Table of Contents