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MB86R02 'Jade-D' Hardware Manual V1.64
Register
BaseAddress + 55C
H
address
Bit
31 30 29 28 27 26 25 24 23 22 21 20
number
Field
name
R/W
Reset
value
IO Module Pad 10 Control
Bit 20 -
NChanSel10
19
Channel selection for N-Pin of Pad i=10 TTL: 00b=channel(i*2+1), 01b=channel(i*2), 10b=clk, 11b=const0 (TTL mode only)
Bit 18 -
ChanSel10
17
Channel selection for Pad i=10 for RSDS: 00b=channel i, 01b=channel(i-1), 10b=clk, 11b=const0, for TTL : 00b=channel i*2,
01b=channel i*2-1, 10b=clk, 11b=const0
Bit 14
NDelay10
N-pin Padcell 10 delay: 0b=no delay, 1b= half bit clock cycle delay (TTL-mode only)
Bit 13
Delay10
Pad 10 delay: 0b=no delay, 1b= half bit clock cycle delay
Bit 7
InOut10
output enable control, 0b=input enabled, 1b=output enabled
Bit 6
NPolarity10
N-pin of Padcell 10 drive polarity: TTL: 0=normal, 1=inverted; RSDS: no effect
Bit 5
Polarity10
Pad 10 drive polarity: TTL: 0=normal, 1=inverted; RSDS: 1=normal, 0=inverted
Bit 4
Mode10
Pad 10 drive mode: 0b=differential, 1b=TTL
Bit 1 - 0
Boost10
Boost factor for drive current: x0b=2mA, x1b=4mA (only boost[0] has effect)
DIR_PIN11_CTRL
Register
BaseAddress + 560
H
address
Bit
31 30 29 28 27 26 25 24 23 22 21 20
number
Field
name
R/W
Reset
value
IO Module Pad 11 Control
Bit 20 -
NChanSel11
19
Channel selection for N-Pin of Pad i=11 TTL: 00b=channel(i*2+1), 01b=channel(i*2), 10b=clk, 11b=const0 (TTL mode only)
Bit 18 -
ChanSel11
17
Channel selection for Pad i=11 for RSDS: 00b=channel i, 01b=channel(i-1), 10b=clk, 11b=const0, for TTL : 00b=channel i*2,
01b=channel i*2-1, 10b=clk, 11b=const0
Bit 14
NDelay11
N-pin Padcell 11 delay: 0b=no delay, 1b= half bit clock cycle delay (TTL-mode only)
Bit 13
Delay11
Pad 11 delay: 0b=no delay, 1b= half bit clock cycle delay
Bit 7
InOut11
output enable control, 0b=input enabled, 1b=output enabled
Bit 6
NPolarity11
N-pin of Padcell 11 drive polarity: TTL: 0=normal, 1=inverted; RSDS: no effect
Bit 5
Polarity11
Pad 11 drive polarity: TTL: 0=normal, 1=inverted; RSDS: 1=normal, 0=inverted
Bit 4
Mode11
Pad 11 drive mode: 0b=differential, 1b=TTL
Bit 1 - 0
Boost11
Boost factor for drive current: x0b=2mA, x1b=4mA (only boost[0] has effect)
DIR_PIN12_CTRL
Register
BaseAddress + 564
H
address
Bit
31 30 29 28 27 26 25 24 23 22 21 20
number
Field
name
R/W
Reset
value
IO Module Pad 12 Control
Bit 20 -
NChanSel12
19
Channel selection for N-Pin of Pad i=12 TTL: 00b=const0, 01b=INV (from inversion control function), 10b=clk, 11b=const0 (TTL mode
19
18
17 16 15
NChanSel10 ChanSel10
NDelay10 Delay10
RW
RW
RW
0
0
H
H
19
18
17 16 15
NChanSel11 ChanSel11
NDelay11 Delay11
RW
RW
RW
0
0
H
H
19
18
17 16 15
NChanSel12 ChanSel12
NDelay12 Delay12
RW
RW
RW
0
0
H
H
14
13
12 11 10 9 8
7
InOut10 NPolarity10 Polarity10 Mode10
RW
RW
0
0
0
H
H
H
14
13
12 11 10 9 8
7
InOut11 NPolarity11 Polarity11 Mode11
RW
RW
0
0
0
H
H
H
14
13
12 11 10 9 8
7
InOut12 NPolarity12 Polarity12 Mode12
RW
RW
0
0
0
H
H
H
6
5
4
3 2 1
Boost10
RW
RW
RW
RW
0
0
1
H
H
H
6
5
4
3 2 1
Boost11
RW
RW
RW
RW
0
0
1
H
H
H
6
5
4
3 2 1
Boost12
RW
RW
RW
RW
0
0
1
H
H
H
22-27
0
0
H
0
0
H
0
0
H
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