Fujitsu MB86R02 Jade-D Hardware Manual page 394

MB86R02 'Jade-D' Hardware Manual V1.64
bit 8 SYNCERR1 of display 1
bit 9 REGUD1 of display 1
bit 10 Capture 0
bit 11 Capture 1
The host address offset of the
The offset address of the corresponding register for interrupt masking (IMASK) is 0x24. It has same bit
allocation.
18-36
IST register is 0x20.