Fujitsu MB86R02 Jade-D Hardware Manual page 579

Graphics controller
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MB86R02 'Jade-D' Hardware Manual V1.64
PFBR (2D Polygon Flag-Buffer Base)
Register
DrawBaseAddress + 450
address
Bit number
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit field name
R/W
Initial value
This register sets the polygon flag buffer base address.
The actual address for VRAM is calculated by adding the segment address of FBR to PFBASE.
CXMIN (Clip X minimum)
Register
DrawBaseAddress + 454
address
Bit number
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit field name
R/W
Initial value
This register sets the clip frame minimum X position.
CXMAX (Clip X maximum)
Register
DrawBaseAddress + 458
address
Bit number
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit field name
R/W
Initial value
This register sets the clip frame maximum X position.
CYMIN (Clip Y minimum)
Register
DrawBaseAddress + 45C
address
Bit number
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit field name
R/W
Initial value
This register sets the clip frame minimum Y position.
CYMAX (Clip Y maximum)
Register
DrawBaseAddress + 460
address
Bit number
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit field name
R/W
Initial value
This register sets the clip frame maximum Y position.
H
PFBASE
RW
Don't care
H
H
H
H
R0
0
CLIPXMIN
RW
Don't care
CLIPXMAX
RW
Don't care
CLIPYMIN
RW
Don't care
CLIPYMAX
RW
Don't care
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