Table of Contents
Advertisement
MB86R02 'Jade-D' Hardware Manual V1.64
TTLCK (pin DISP[j])
Register DIR_Pin_ctrl[j].Delay=0
TTLDAT (pins DISP[i])
Registers DIR_Pin_ctrl[i].Delay=0
Register Dir_SSwitch.SSwitch =0
TTLCK (pin DISP[j])
Register DIR_Pin_ctrl[j].Delay=0
Register DIR_Pin_Ctrl[j].Polarity=1
TTLDAT (pins DISP[i])
Registers DIR_Pin_ctrl[i].Delay=0
Register Dir_SSwitch.SSwitch =0
22.5.3 Limitations
•
Several configuration registers only have an effect with TTL-mode enabled. These registers
are marked "TTL-mode only".
•
Reprogramming of configuration registers during active display can cause undefined effects.
•
Only word access is supported for the address range 0h ... 0FFh (embedded memory). Byte
or halfword access is not allowed to this address range. All the other addresses support byte,
halfword, word access.
TTLCKH
50%
DISPSU
Pins TSIG[i]
Figure 22-11 TTL operation output timing (1)
TTLCKH
50%
DISPSU
Pins TSIG[i]
Figure 22-12 TTL operation output timing (2)
TTLCKL
DISPHD
TSIGSU
TSIGHD
TTLCKL
DISPHD
TSIGSU
TSIGHD
22-41
Advertisement
Table of Contents
